Part $1$: Simulate an SR$-$Latch

Implement the NOR$-$gate SR latch $($not level sensitive$)$ that we discussed in class:

A$)$ Create a simulation $/$ schematic in Digital Software. Verify that the circuit

works as expected.

B$)$ Demonstrate the oscillating output case for an SR latch by setting both inputs to

HI and then changing them both to low $$simultaneously$$ using single gate step mode. Part $1$: Simulate an SR$-$Latch Implement the NOR$-$gate SR latch $($not level sensitive$)$ that we discussed in class:

A$)$ Create a simulation $/$ schematic in Digital Software. Verify that the circuit works as expected.

B$)$ Demonstrate the oscillating output case for an SR latch by setting both inputs to $HI$ and then changing them both t

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