Problem $10$

Design the $"$WE Logic" block of the LC$-3$b datapath as shown on Figure C$.3$ in Appendix $C.$

The inputs to the block are MAR$[0],$ R$.$W$,$ and DATA.SIZE.

The outputs of the block are WE$0$ and WE$1.$

Show the truth table for this logic block and give a gate$-$level implementation. For the gate$-$level implementation, RD$=\text{'}0\text{'},$ WR$=\text{'}1\text{'},$ Byte$=\text{'}0\text{'},$ and Word$=\text{'}1\text{'}.$