Problem 1: (6 pts, 3 pts each sub-part) Consider two different implementation of the same instruction set architecture. The instruction can be divided into four classes according to their CPI (class A, B, C and D). P1 with clock rate of 2.5 GHz and CPIs of 1, 2, 3 and 3, and P2 with a clock 3 GHz and CPIs of 2, 2, 2 and 2. Given a program with a dynamic instruction count of 1.0E6 instructions divided into classes as follows: 10% class A, 20% class B, 50% class C and 20% class D, which implementation is faster? What is the global CPI for each implementation? Find the clock cycle required in both cases a) b) Solution