Problem $3($Design for Performance$)$

Consider two different implementations of the same instruction set architecture. The instructions can be

divided into four classes according to their CPI: class A$,$ class B$,$ class C and class D$.$ Processor P$1$ has a $3$

GHz clock rate and CPIs of $2,3,2,3,$ respectively, for the four instruction classes. Processor P$2$ has a $4$

GHz clock rate and CPIs of $2,1,3,2,$ respectively.

Given a program with a runtime instruction count of $2\mathrm{.}0$ x $106$ instructions divided into the four classes as

follows: $20\%$ class A$,30\%$ class B$,40\%$ class C$,$ and $20\%$ class D$.$

A$.$ Which implementation is faster?

B$.$ What is the average CPI for each implementation?

C$.$ Find the clock cycles required in both cases.