Question: Q 2 ( a ) The jal ( jump and link ) instruction in RSIC - V has the following format: jal rd , offset

Q 2(a)
The jal (jump and link) instruction in RSIC-V has the following format:
jal rd, offset
In which the rd stores the return register, the offset represents the 21-bit offset of
the target instruction's memory address relative to the current instruction's memory
address.
i) How many instructions can a j al instruction jump forwards (i.e., to higher
addresses)?
ii) How many instructions can a jal instruction jump backwards (i.e., to lower
addresses)?
Q 2(b)
[15 Marks]
The J-type instruction in RISC-V has the following encoding format. Only the most
significant 20 bits (20:1) of the 21-bit (20:0) signed immediate value are encoded in
the instruction; the least significant bit (bit 0) is not encoded because it is always 0.
Convert the following jump instructions into machine code. Instruction addresses are
given to the left of each instruction. The J-Type instruction's 7-bit opcode (i.e., the
op) is 1101111.
Q 2(c)
Write a RISC-V assembly language program for swapping the contents of two
registers, a 0 and a 1, without using any other temporary register. Comment on your
code.
Q 2 ( a ) The jal ( jump and link ) instruction

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