Question $2$

Figure $2$ shows a Carry Save Adder structure that handles a three $8-$bit unsigned operands. It is based on the same l$-$bit full adder $($FA$)$ unit that takes $1\mathrm{.}9$ ns to generate a carry and $2\mathrm{.}7$ ns to generate a sum.

a$.$ Calculate the total number of transistors necessary to implement the CSA adder of Figure $2.$ Use the more efficient Full adder implementation as seen during the lecture.

b$.$ Calculate the maximum operating frequency of the CSA adder of Figure $2.$

Figure $2$: Carry Save Adder $($CSA$)$