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1/Two important parameters control the performance of a processor: cycle time and cycles per instruction. There is an enduring tradeoff between these two parameters in the design process of microprocessors. While some designers prefer to increase the processor frequency at the expense of large CPI, other designers follow a different school of thought in which reducing the CPI comes at the expense of lower processor frequency. Consider the following machines, and compare their performance using the following instruction mix: 25% loads, 13% stores, 47% ALU instructions, and 15% branches/jumps. Assume the unmodified multiacycle datapath and finite state machine. Calculate which machine is faster? a/Loads: 5 cycles Stores: 4 cycles ALU: 4 cycles Branch/Jumps: 3 cycles clock 1Ghz b/Loads shorten to 4 cycles ALUS shorten to 3 cycles clock 3.2 GHz c/Loads shorten to 3 cycles Stores shorten to 3 cycles ALUS shorten to 3 cycles Clock 2.8 GHz