STEPS PLZ

Consider a computer system with $8-$bit memory addresses, a cache with $4$ blocks and the size of

each block $2$ bytes.

B$.$ Assume a $2-$way set associative chahe is used with $4$ sets.

a$.$ How many data bytes can be stored in the cache? Exclude the tag, valid, and LRU

bits.

b$.$ How many bits are used for the tag? And how many bits are used for the index?

c$.$ Given the following addresses, show the tag, index and offset bits for each

addresses: $11001010$ and $0010010.$

d$.$ Consider the following sequence of cache read operations to the following

addresses: $00101010,00101011,11001100,11001010,11001011,00111101,$

$00111100,00101100.$

Use the following table to show the sequence of tags accessed in each tage block

starting at the top.