Task $2$: Gray Code Counter with D Flip$-$Flop $[30$ Marks$]$

A Gray Code Counter can be implemented sequentially with flip$-$flops.

$-$ Implement a $4-$bit Gray Code Counter using D Flip$-$Flops in VHDL$.$

$-$ Derive the state diagram and state table for the counter.

$-$ Develop the VHDL code and verify it using the simulation log and timing diagram.