The picture below shows a state machine. It has one input (X), a three-bit state (Y1 Y2 Y3), and one output (Z).

Derive a state diagram for the state machine. Use states S0-S7 to represent the binary codes for Y1Y2Y3 from 000 to 111. For example, S0 = 000, S1 = 001, and so forth.

Create a Verilog model of the circuit and verify that its operation is the same as described by your answer to part (a). Use a procedural approach for implementing the state machine. Use parameters to define the states. (You may use continuous assignment instead of procedural assignment to describe the output.)

This is an analysis problem. You have a logic circuit.

Can you derive logic equations from it?

Can you map these equations?

Can you use the logic values to reconstruct an encoded state table: one where you have values Y1⁺Y2⁺Y3⁺ and Z for all combinations of X, Y1, Y2, and Y3 that is, for all combinations of input and present state?

Can you use the state assignment described above to reverse the encoding and obtain the state table?

Can you use the state table to draw the state diagram?

It is also an implementation problem. Can you use the state diagram directly to write a Verilog procedural model for the state machine? (Of course, you could use flip-flops along with continuous assignment to represent the next state and output equations, but you shouldnt do that.)

X Y1Y2 Y3 AND2 ORS Y1 inst5 inst13. insto inst7 OR3 Y2 insta inst14 inst17 Y3 inst15 inst18 inst11 CLK inst12 AND3 X Y1Y2 Y3 AND2 ORS Y1 inst5 inst13. insto inst7 OR3 Y2 insta inst14 inst17 Y3 inst15 inst18 inst11 CLK inst12 AND3