There is a four$-$bit adder circuit called adder$4$ that is configured as shown in $($Figure $2),$ with inputs $CI,A[3$:$0]$ and $B[3$:$0]$ and outputs $CO,S[3$:$0].$ Inside adder$4,$ there is a one$-$bit adder circuit called adder, with inputs $CI,A,B,$ and outputs $CO,S.$

$(1)$ Coding the adder circuit in Verilog HDL$.$

$(2))$ Coding the adder$4$ circuit with Verilog HDL$,$ the adder circuit should be used as an internal module.

On the adder module, $A+B+CI=CO**2+S$

Previous Arithmetic Addition Has Been Performed

On the adder $4$ module, $A+B+CI=CO**16+S$

Binary arithmetic addition performed

inside the adder module, the behavioral description,

Regardless of structural description

Only structural description should be used inside the adder$4$ module