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Question 1. Machine code for the four instruction set architectures (a) How many bytes are needed for each instruction for the accumulator architecture? Show how you would arrange the fields for the instructions STORE A and MUL D. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode 0xl and MUL has the opcode 0x3. (b) How many bytes are needed for each instruction for the stack architecture? Show how you would arrange the fields for the instructions PUSH A and MUL. Show the resulting machine code for these instructions in hexadecimal, assuming PUSH has the opcode 0x0 and MUL has the opcode 0x3. (c) How many bytes are needed for each instruction for the two-address load-store architecture? Assume there are 16 working registers in the register file. Show how you would arrange the fields for the instructions LOAD R1, B and MUL R2, R1. Show the resulting machine code for these instructions in hexadecimal, assuming LOAD has the opcode 0x2 and MUL has the opcode 0x3. (d) How many bytes are needed for each instruction for the three-address memory-memory architecture? Show how you would arrange the fields for the instruction ADD A, C, D. Show the resulting machine code for this instructions in hexadecimal, assuming ADD has the opcode 0x2. Question 1. Machine code for the four instruction set architectures (a) How many bytes are needed for each instruction for the accumulator architecture? Show how you would arrange the fields for the instructions STORE A and MUL D. Show the resulting machine code for these instructions in hexadecimal, assuming STORE has the opcode 0xl and MUL has the opcode 0x3. (b) How many bytes are needed for each instruction for the stack architecture? Show how you would arrange the fields for the instructions PUSH A and MUL. Show the resulting machine code for these instructions in hexadecimal, assuming PUSH has the opcode 0x0 and MUL has the opcode 0x3. (c) How many bytes are needed for each instruction for the two-address load-store architecture? Assume there are 16 working registers in the register file. Show how you would arrange the fields for the instructions LOAD R1, B and MUL R2, R1. Show the resulting machine code for these instructions in hexadecimal, assuming LOAD has the opcode 0x2 and MUL has the opcode 0x3. (d) How many bytes are needed for each instruction for the three-address memory-memory architecture? Show how you would arrange the fields for the instruction ADD A, C, D. Show the resulting machine code for this instructions in hexadecimal, assuming ADD has the opcode 0x2