Question: We are considering adding a new instruction to the MIPS ISA: lwi rt, rd(rs). This means load word indirect, where rt

We are considering adding a new instruction to the MIPS ISA: lwi rt, rd(rs). This means load word indirect, where rt <-- Mem[rd + rs]

a) Which existing blocks of the MIPS data path can be used to implement this new instruction?

b) What new functional blocks are needed to execute it?

c) What new signals from the Control Unit must be created to allow the execution of this instruction?

d) How long would it take in a single cycle implementation? In a multicycle implementation?

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