Question: We have a hypothetical microprocessor with a 1 6 Kbyte unified L 1 cache. The miss rate for this cache is 3 % and the

We have a hypothetical microprocessor with a 16 Kbyte unified L1 cache. The miss rate for this cache is 3%
and the hit time is 2 CCs. The processor also has an 8 Mbyte, on-chip L2 cache. 95% of the time, data requests
to the L2 cache are found. If data is not found in the L2 cache, a request is made to a 4 Gbyte main memory.
The time to service a memory request is 100000 CCs. On an average, it takes 3.5 CCs to process a memory
request. How often is data found in main memory?

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