Which description is more accurate about the line below?counter$0$to$9$ u$0(.$enable$($pb$),.$clock$($clock$),.$clear$\_$n$($clear$),.$Q$($QU$),.$c$9($e$\_$tens$))$; Question $10$ Select one:Instance of module u$0$ which must be written in SystemVerilog onlyInstance of module counter$0$to$9$ which must be specified in SystemVerilog onlyInstance of module counter$0$to$9$ which could be specified in many formsInstance of module u$0$ which could be specified in many forms