Question: Write a behavioral Verilog module for the 8-bit LFSR given. The LFSR loads the initial state 8b00000001. The LFSR should start and end with this

Write a behavioral Verilog module for the 8-bit LFSR given. The

Write a behavioral Verilog module for the 8-bit LFSR given. The LFSR loads the initial state 8b00000001. The LFSR should start and end with this state. The tap coefficients of the LFSR are 7b1001111.

C2 D O YIN-2] clk clk clk clk ck clk Figure 1: A Linear Feedback Shift Register C2 D O YIN-2] clk clk clk clk ck clk Figure 1: A Linear Feedback Shift Register

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