Question: Write verilog code please: The Finite State Machine is equipped with four external inputs, namely begin, flagzero, clock and reset along with one output labeled

Write verilog code please: The Finite State Machine is equipped with four external inputs, namely begin, flagzero, clock and reset along with one output labeled done, signaling the completion of the calculation. This unit executes necessary control operations and furnishes three outputs: 3-bits opcode, 2- bits op_1, and 2-bits op_2.

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