Your task is to implement a processor that can execute the following instructions:

Operation Function performed Description

load Rx$,$ D Rx $$ D Load constant value D into Rx

mov Rx$,$ Ry Rx $[$Ry$]$ Move contents of Ry into Rx

add Rx$,$ Ry Rx $[$Rx$]+[$Ry$]$ Add contents of Rx and Ry and put result into Rx

xor Rx$,$ Ry Rx $[$Rx$]$ xor $[$Ry$]$ Bitwise XOR contents of Rx and Ry and put result into Rx

The load instruction allows an n$-$bit constant to be loaded into a register $($it is recommended to start with n$=3.$ Once

you add memory, extend this to n$=8$ or n$=16)$

The mov instruction allows data to be copied from one register to another.

The add and xor instructions perform addition and bitwise XOR functions on the two operands and places the result

back into the first operand.

The number of bits used to encode your instructions is up to you. It is recommended that you use at least $3$ or $4$

instruction bits so that you can add additional instructions later. The number of registers in the processor is up to

you.

Do this is verilog