Repeat Problem 7.25 with the following changes:

1. Replace Q₁ with a p-channel MOS transistor, M₁. Replace Q₂ and Q₃ with n-channel MOS transistors, M₂ and M₃.

2. Add a resistor of value 1/g_m1 from the gate to the source of M₁.

3. Take V_SUPPLY = 2.5 V.

4. Use the formula for C_db0 given in Problem 7.17.

5. For all transistors: L_drwn = 2 µm, L_d = 0.2 µm, X_d = 1 µm, and γ = 0. W₁ = 200 µm and W₂ =

W₃ = 100 µm. Use (1.201) and (1.202) with ψ₀ = 0.6 V for the junction capacitances. Use the equations in Problem 7.17 for C_db0. NMOS data: V_tn = 1 V, k€™_n = 60 µA/V², λ_n = 1/(100 V), C_ox = 0.7 fF/(µm²), C_j0 = 0.4 fF/(µm²), and C_jsw0 = 0.4 fF/µm. PMOS data: V_tp = ˆ’1 V, k€™_p = 20 µA/V², |λ_p| = 1/(50 V), C_ox = 0.7 fF/(µm²), C_j0 = 0.2 fF/(µm²), and C_jsw0 = 0.2 fF/µm.

Data from Prob. 7.25:

An amplifier stage is shown in Fig. 7.41 where bias current I_B is adjusted so that V_O = 0 V dc. Take V_SUPPLY = 10 V.

(a) Calculate the low-frequency, small-signal trans-resistance Ï…_o/i_i and use the zero-value time-constant method to estimate the ˆ’3-dB frequency. Data: npn: β = 100, f_T = 500 MHz at I_C = 1 mA, C_μ0 = 0.7 pF, C_je = 3 pF (at the bias point), C_cs0 = 2 pF, r_b = 0, and V_A = 120 V. Assume n = 0.5 and ψ₀ = 0.55 V for all junctions. pnp: β = 50, f_T = 4 MHz at I_C = ˆ’0.5 mA, C_μ0 = 1.0 pF, C_je = 3 pF (at the bias point), C_bs0 = 2 pF, r_b = 0, and |V_A| = 50 V. Assume n = 0.5 and ψ₀ = 0.55 V for all junctions.

(b) Repeat (a) if a 20-pF capacitor is connected from collector to base of Q₁.

Fig. 7.41:

Transcribed Image Text:

VSUPPLY )'s + i; 'a + 30 k2 Q2 Q3 -VSUPPLY