Question: A computer has a 256 word memory and a 16 word cache. The cache line size is one word. The following sequence of addresses is

A computer has a 256 word memory and a 16 word cache. The cache line size is one word. The following sequence of addresses is read in series:

Show how the cache memory would be accessed assuming that all lines are initially invalid. In each cache, mark the access as hit, capacity miss, compulsory miss, or conflict miss. Do this for each of the following.

a. Fully associative cache

b. Direct-mapped cache

c. Two-way set associative cache.

0,1,2,3,4,5,10,13,16,19,21,4,8,12,30,40,41,42,35,1,3,13

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