Someone has asked about the possibility of data hazards occur ring through memory, as opposed to through a register. Which of the following statements about such hazards are true?

1. Since memory accesses only occur in the MEM stage, all memory operations are done in the same order as instruction execution, making such hazards impossible in this pipe line.

2. Such hazards are possible in this pipeline; we just have not discussed them yet.

3. No pipeline can ever have a hazard involving memory, since it is the programmer’s job to keep the order of memory references accurate.

4. Memory hazards may be possible in some pipelines, but they cannot occur in this particular pipeline.

5. Although the pipeline control would be obligated to maintain ordering among memory references to avoid hazards, it is impossible to design a pipeline where the references could be out of order.