Instead of a single-cycle organization, we can use a multicycle organization where each instruction takes multiple cycles but one instruction inishes before another is fetched. In this organization, an instruction only goes through stages it actually needs (e.g., ST only takes 4 cycles because it does not need the WB stage). Compare clock cycle times and execution times with single-cycle, multi-cycle, and pipelined organization.

The remaining problems in this exercise assume that instructions executed by the processor are broken down as follows:

a. b. ALU 45% 55% BEQ 20% 15% LW 20% 15% SW 15% 15%