The MIPS architecture requires word-sized accesses (lw and sw) to be word-aligned, i.e., the lowermost 2 bits of the address must both be zero. If an address is not word-aligned, the processor raises a “bus error” exception. Explain how this alignment requirement affects the execution of this function.

The first three problems in this Exercise refer to the following function, given in MIPS assembly. Unfortunately, the programmer of this function has fallen prey to the pitfall of assuming that MIPS is a word-addressed machine, but in fact MIPS is byte-addressed.

Note that in MIPS assembly the “;” character denotes that the remainder of the line is a comment.

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; int f(int *a, int n, int x); f: move $v0,$0 : ret=0 move $t0,$a0 : ptr-a add $t1,$al, $a0; &(a[n]) $t2,0 ($t0) $t2,$a2, S L: lw : read *p ; if(*p=x) $v0, $v0,1 ; ret++; : p=p+1 bne addi S: addi $t0,$t0,1 bne $t0,$t1, L $ra : repeat if p!-&(a[n]) return ret ;