Design a multiplier for 16-bit binary integers. Use a design similar to Figures 4-33 and 4-34.
(a) Draw the block diagram. Add a counter to the control circuit to count the number of shifts.
(b) Draw the SM chart for the controller (three states). Assume that the counter outputs K = 1 after 15 shifts have occurred.
(c) Write Verilog code for your design.