Implement a 2-bit binary counter using one logic block as shown in Figure 6-1(a). A₀is the least significant bit, and A₁is the most significant bit of the counter. The counter has a synchronous load (Ld). The counter operates as follows: En = 0 No change. En = 1, Ld = 1 Load A₀and A₁with external inputs U and V on rising edge of clock. En = 1, Ld = 0 Increment counter on rising edge of clock.

(a) Give the next-state equations for A₀and A₁.

(b) Show all required inputs and connections on a copy of Figure 6-1(a). Show the connection paths with heavy lines. Use the CE input. Give the function realized by each 4-input LUT.

Figure 6-1(a)

X X Function QX D FF CE X2 generator X - LUT4 X4- Y - Y Function generator to Y2 - D FF QY CE Y3 LUT4 YA Y L (a) L.