New Semester Started Get 50% OFF Study Help! --h --m --s Claim Now

Question Answers

Textbooks

Find textbooks, questions and answers

Oops, something went wrong!

Change your search query and then try again

Result Not Found

Books FREE
Study Help
Tutors
AI Study Planner NEW
Sell Books

Search
Sign In
Register

study help
engineering
electronic devices and circuit theory

Electronic Devices And Circuit Theory 11th Edition Robert Boylestad, Louis Nashelsky - Solutions

Given the characteristics of Fig. 9.78, sketch:a. The normalized gain.b. The normalized dB gain (and determine the bandwidth and cutoff frequencies). 200 100 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz 1 MHz f(log scale)
Repeat the analysis of Example 9.11 with ro = 40 kΩ . What is the effect on Avmid, fLS, fLC, fLE, and the resulting cutoff frequency?Example 9.11 EXAMPLE 9.11 Determine the cutoff frequencies for the network of Fig. 9.25 using the following parameters: Cy = 10 µF, CE 20 μF, Cc = 1 µF R1 40
For the network of Fig. 9.79 :a. Determine the mathematical expression for the angle by which Vo leads Vi .b. Determine the phase angle at f = 100 Hz, 1 kHz, 2 kHz, 5 kHz, and 10 kHz, and plot the resulting curve for the frequency range of 100 Hz to 10 kHz.c. Determine the break frequency.d. Sketch
Calculate the power gain in decibels for each of the following cases.a. Po = 100 W, Pi = 5 W.b. Po = 100 mW, Pi = 5 mW.c. Po = 100 mW, Pi = 20 mW.
Determine G dBm for an output power level of 25 W.
Repeat Problem 15 for the emitter-stabilized network of Fig. 9.81.Problem 15For the network of Fig. 9.80 :a. Determine r e.b. Find Avmid = Vo/Vi.c. Calculate Z i.d. Determine fLS, fLC, and fLE.e. Determine the low cutoff frequency.f. Sketch the asymptotes of the Bode plot defined by the cutoff
For the network of Fig. 9.80 :a. Determine re.b. Find Avmid = Vo/Vi.c. Calculate Z i.d. Determine fLS, fLC, and fLE.e. Determine the low cutoff frequency.f. Sketch the asymptotes of the Bode plot defined by the cutoff frequencies of part (d).g. Sketch the low-frequency response for the amplifier
Repeat Problem 15 for the emitter-follower network of Fig. 9.82.Fig. 9.82Problem 15For the network of Fig. 9.80 :a. Determine r e.b. Find Avmid = Vo/Vi.c. Calculate Z i.d. Determine fLS, fLC, and fLE.e. Determine the low cutoff frequency.f. Sketch the asymptotes of the Bode plot defined by the
Use Schematic Capture or Multisim to obtain the output waveform for a 2-V step input to an integrator circuit, as shown in Fig.10.39 with values of R = 40 kΩ and C = 0.003 μF.Fig.10.39 C=1 µF R ov OV vy(1) = 1 V Ww 1 M2 Op-amp RC RC -1 V -10 V (b) (c)
Calculate the output voltage for the circuit of Fig. 11.47 for an input of Vi = 3.5 mV rms.Fig. 11.47 180 k2 +12 V 3.6 kQ 11 741 V, (10 (5) 6. -12 V FIG. 11.47 4.
Calculate the output voltage of the circuit of Fig. 11.48 for an input of 150 mV rms.Fig. 11.48 750 k2 +9 V 36 k2 11) 4 - Vo (10 741 6. 5 -9 V V A FIG. 11.48
Determine the output voltage for the circuit of Fig. 11.52.Fig. 11.52 330 k2 470 k2 33 ka V1 12 mV 47 k2 V. 47 ka 18 mV
Calculate the cutoff frequency of a first-order low-pass filter in the circuit of Fig. 11.57.Fig. 11.57 10 k2 10 k2 V. 2.2 k2 V :0.05 uF FIG. 11.57
Calculate the cutoff frequency of the high-pass filter circuit in Fig. 11.58.Fig. 11.58 10 k2 10 k2 20 k2 20 k2 0.02 uF 0.02 µF FIG. 11.58
What turns ratio transformer is needed to couple to an 8-Ω load so that it appears as an 8-kΩ effective load?
What maximum power can a silicon transistor (TJmax = 200°C) dissipate into free air at an ambient temperature of 80°C?
Use Design Center to draw the schematic of Fig.12.35 with Vi = 9.1 mV.Fig.12.35 +Vcc (18 V) Rc- 16 2 Rs 1.2 k2 V. B - 40 100 µF FIG. 12.35
Use Design Center to draw the schematic of Fig. 12.36 with Vi = 25 V(p). Determine the circuit efficiency. Fig. 12.36 +Vcc (+30 V) VL C2 82 Q1 R2 -VEr (-30 V) FIG. 12.36
Use Design Center to draw the schematic of Fig. 12.36 with Vi = 25 V(p). Determine the circuit efficiency. Fig. 12.36 +Vcc (+30 V) R1 VL R. 82 R3 C2 Q1 R2 -VEr (-30 V) FIG. 12.36
What voltage resolution is possible using a 12-stage ladder network with a 10-V reference voltage?
For a dual-slope converter, describe what occurs during the fixed time interval and the count interval.
How many count steps occur using a 12-stage digital counter at the output of an ADC?
Calculate the VCO free-running frequency for the circuit of Fig. 13.26 b with R1 = 4.7 k and C1 = 0.001 μF.Fig. 13.26 V+ 565 10 2 Phase 3.6 ka 7 Demodulated Input < Amp. detector output 5 6 Reference output 4 VCO Output 9. (a)
What value of capacitor C1 is required in the circuit of Fig.13.26 b to obtain a center frequency of 100 kHz?Fig. 13.26 V+ 565 10 2 Phase 3.6 ka 7 Demodulated Input detector Amp. indino 5 6 Reference output 4 VCO Output 6. Ri (a)
Describe the signal conditions for current-loop and RS-232C interfaces.
Use Design Center to draw a schematic circuit as in Fig. 13.32 , using an LM111 with Vi = 5 V rms applied to minus (–) input and +5 V rms applied to plus (+) input. Use Probe to view the output waveform.Fig. 13.32 E OPCAD Capture CIS - Demo Edition File Edit View Tools Place Macro PSpice
What is a data bus?
Use Multisim to draw a 555 oscillator with resulting output with low = 2 ms and thigh = 5 ms.
A FET phase-shift oscillator having gm = 6000 μS, rd = 36 kΩ and feedback resistor R = 12 k are to operate at 2.5 kHz. Select C for specified oscillator operation.
Draw circuit diagrams of (a) a series-operated crystal oscillator and (b) a shunt-excited crystal oscillator.
What is the ripple factor of a sinusoidal signal having a peak ripple of 2 V on an average of 50 V?
A filter circuit provides an output of 28 V unloaded and 25 V under full-load operation. Calculate the percentage voltage regulation.
A simple capacitor filter fed by a full-wave rectifier develops 14.5 V dc at 8.5% ripple factor. What is the output ripple voltage (rms)?
A full-wave rectifier operating from the 60-Hz ac supply produces a 20-V peak rectified voltage. If a 200- μF capacitor is used, calculate the ripple at a load of 120 mA.
Calculate the size of the filter capacitor needed to obtain a filtered voltage having 15% ripple at a load of 150 mA. The full-wave rectified voltage is 24 V dc, and the supply is 60 Hz.
Calculate the size of the filter capacitor needed to obtain a filtered voltage with 7% ripple at a load of 200 mA. The full-wave rectified voltage is 30 V dc and the supply is 60 Hz.
Modify the circuit of Fig. 15.38 to include a load resistor RL. Keeping the input voltage fixed at 10 V, do a sweep of the load resistor from 100 Ω to 20 kΩ, showing the output voltage using Probe.Fig. 15.38 OCCAD Capture CIS Demo Edition V (SCHEMATIC1: PAGEI)I Eile [dit View Iools Place Macro
Run a PSpice analysis of the circuit of Fig. 15.19 for V Z = 4.7 V and beta ( Q1 ) = beta ( Q2 ) = 100, and vary Vi from 5 V to 20 V.Fig. 15.19 Rsc V. (= VL) V, R4 Q2 R3 RL Vz R2 R5
Using the characteristics of Fig. 16.6(c), determine the reactance of the diode capacitor at a frequency of 1 MHz and a reverse bias potential of 1 V. Is it significant?Fig. 16.6(c) 10 Cp= 9.2 pF at -0.1 V 9 f= 1 MHz 8 Cp= 3.4 pF at -1 v 0.1 VR- Reverse voltage (V) 1 10 100 15825 Diode capacitance
Repeat the analysis of problem 15 for the network of Fig. 9.82 with the addition of a sour resistance and signal source as shown in Fig. 9.86 . Plot the gain Avs = Vo Vs and comment on the change in low-frequency cutoff as compared to problem 17.problem 17Repeat Problem 15 for the emitter-follower
Repeat the analysis of problem 15 for the network of Fig. 9.83 with the addition of a source resistance and signal source as shown in Fig. 9.87. Plot the gain Avs = VoVs and comment on the change in low-frequency cut-off as compared to problem 18.Problem 18Repeat Problem 15 for the common-base
Repeat the analysis of problem 15 for the network of Fig. 9.81 with the addition of a source resistance and signal source as shown in Fig. 9.85 . Plot the gain Avs = Vo Vs and comment on the change in low-frequency cutoff as compared to problem 16.Fig. 9.85 Problem 16a. Repeat problem 15 for
Repeat the analysis of problem 15 for the network of Fig. 9.80 with the addition of a source resistance and signal source as shown in Fig. 9.84. Plot the gain Avs = and comment on the change in low-frequency cutoff as compared to problem 15.Fig. 9.84problem 15For the network of Fig. 9.80 :a.
a. The feedback capacitance of an inverting amplifier is 10 pF. What is the Miller capacitance at the input if the gain of the amplifier is—120?b. What is the Miller capacitance at the output of the amplifier?c. Is it a good approximation to assume CM: |A,|C; and CM, C?
For the network of Fig. 9.80 with R s and V s of Fig. 9.84 :a. Determine fHi and fHo.b. Find fb and fT.c. Sketch the frequency response for the high-frequency region using a Bode plot and determine the cutoff frequency.d. What is the gain-bandwidth product of the amplifier? 14 V Cw, = 5 pF Che
Repeat the analysis of Problem 27 for the network of Fig. 9.81 with R s and V s of Fig. 9.85.Problem 27a. The feedback capacitance of an inverting amplifier is 10 pF. What is the Miller capacitance at the input if the gain of the amplifier is—120?b. What is the Miller capacitance at the output of
For the network of Fig. 9.88 :a. Determine gm0 and gm.b. Find A v and Avs in the mid-frequency range.c. Determine fHi and fHo.d. Sketch the frequency response for the high-frequency region using a Bode plot and determine the cutoff frequency.e. What is the gain-bandwidth product of the
Repeat the analysis of Problem 31 for the network of Fig. 9.89.Fig. 9.89Problem 31For the network of Fig. 9.88 :a. Determine gm0 and gm.b. Find A v and Avs in the mid-frequency range.c. Determine fHi and fHo.d. Sketch the frequency response for the high-frequency region using a Bode plot and
Repeat the analysis of Problem 27 for the network of Fig. 9.83 with Rs and Vs of Fig. 9.87.Fig. 9.87Problem 27a. The feedback capacitance of an inverting amplifier is 10 pF. What is the Miller capacitance at the input if the gain of the amplifier is—120?b. What is the Miller capacitance at the
Using PSpice Windows, determine the frequency response of Vo>Vs for the BJT amplifier of Fig. 9.87 .Fig. 9.87 0.1 k2 + V, FIG. 9.87
What is the output voltage in the circuit of Fig. 10.62? 250 k2 20 k2 V = 1.5 V FIG. 10.62
Repeat Problem 38 for the network of Fig. 9.83 using Multisim.Using PSpice Windows, determine the frequency response of Vo>Vs for the BJT amplifier of Fig. 9.87Fig. 9.87 C = 18 pF Che = 24 pF Ce = 12 pF o4 V 9-16 V %3D Cbe = 18 pF Che = 24 pF Ce = 12 pF Cwi = 8 pF Cw. = 10 pF 1.2 k2 2 3.3 k2 10
Repeat Problem 38 for the JFET configuration of Fig. 9.88 using Multisim.Problem 38Using PSpice Windows, determine the frequency response of Vo>Vs for the BJT amplifier of Fig. 9.87 .Fig. 9.87Fig. 9.88 0.1 k2 + V, 2. FIG. 9.87
Calculate the overall voltage gain of four identical stages of an amplifier, each having a gain of 20.
A four-stage amplifier has a lower 3-dB frequency for an individual stage of f1 = 40 Hz. What is the value of f1 for this full amplifier?
What input voltage results in an output of 2 in the circuit of Fig. 10.64 ? 1 MQ 20 k2 FIG. 10.64
What is the range of the output voltage in the circuit of Fig. 10.65 if the input can vary from 0.1 to 0.5 V?Fig. 10.65 200 k2 20 k2 (0.1 to 0.5 V) V. FIG. 10.65
What output voltage results in the circuit of Fig. 10.70 for V1 = 0.5 V? V. + V1 FIG. 10.70
Calculate the output voltage for the circuit of Fig. 10.71.FIG. 10.72 100 k2 20 k2 V, = 1.5 V FIG. 10.71
Calculate the output voltages V2 and V3 in the circuit of Fig. 10.72. 200 k2 20 k2 V = 0.2 V V3 200 k2 10 k2
Calculate the input bias current at each input of an op-amp having specified values of IIO = 4 nA and IIB = 20 nA. 200 k2 2 k2 2 ks2 FIG. 10.75
Use Schematic Capture or Multisim to draw a circuit to determine the output voltage in the circuit of Fig. 10.62.Fig. 10.62 Va 360 k2 12 k2
Use Schematic Capture or Multisim to calculate the output voltage in the circuit of Fig. 10.71.Fig. 10.71 100 k2 20 k2 V, = 1.5 V FIG. 10.71
For an op-amp having a slew rate of SR = 2.4 V/ms, what is the maximum closed-loop voltage gain that can be used when the input signal varies by 0.3 V in 10 μs?
Determine the output voltage of an op-amp for input voltages of Vi1 = 200 mV and Vi2 = 140 mV. The amplifier has a differential gain of Ad = 6000 and the value of CMRR is:a. 200.b. 105.
Use Schematic Capture or Multisim to calculate the output voltage in the circuit of Fig.10.73.Fig.10.73 100 k2 V, =0.1 V 20 k2 400 k2 10 k2 20 k2 FIG. 10.73 J6L
Calculate the output current Io in the circuit of Fig. 11.55.Fig. 11.55 +12 V To 200 k2 V, = 10 mV w 6 741 1 mA M -12 V movement 100 k2 10 2
For the circuit of Fig. 11.53, calculate IL.Fig. 11.53 10 k2 IL 2 ΚΩ 12 v= 2 k2
Calculate Vo for the circuit of Fig. 11.54.Fig. 11.54 10 kΩ 2.5 mA 1
Calculate Vo in the circuit of Fig.11.56.Fig.11.56 V = 3 V- 10 k2 5 k2 10 k2 1 k2 10 kQ 5 k2 10 k2 V2=1 V
Use Design Center to draw the schematic of Fig.11.60 and determine Vo.Fig.11.60 300 k2 10 k2 V, = 10 mV 20 k2 V2= 20 mV 30 k2 V3= 30 mV V. RI = 1 M2 RO = 02 AVD = 100,000 FIG. 11.60
Use Design Center to calculate I(VSENSE) in the circuit of Fig. 11.61.Fig. 11.61 200 k2 V = 2 V w RI = 1 M2 1 mA meter RO = 02 AVD = 100,000 C9 200 k2 10 k2
Use Multisim to plot the response of the low-pass filter circuit in Fig. 11.62.Fig. 11.62 20 kS2 200 k V. 20 k2 RI = 1 M2 = 0.5 V RO = 100 2 AVD = 200,000 0.05 µF FIG. 11.62
Use Multisim to plot the response of the high-pass filter circuit in Fig. 11.62.Fig. 11.62 20 k2 200 k2 V. 0.002 uF 0.002 μF + RI = 500 k2 = 0.5 V RO = 200 2 AVD = 50,000 10 k2 10 kQ FIG. 11.63
Use Design Center to plot the response of the bandpass filter circuit in Fig. 11.64.Fig. 11.64 20 k2 200 kN 20 kn 200 kQ 10 kN 0.002 µF = 0.5 V Op-amps RI = 500 k2 10 ΚΩ 0.05 µF RO = 100 2 AVD = 50,000
A class A transformer-coupled amplifier uses a 25:1 transformer to drive a 4-Ω load. Calculate the effective ac load (seen by the transistor connected to the larger turns side of the transformer).
Calculate the transformer turns ratio required to connect four parallel 16-Ω speakers so that they appear as an 8-kΩ effective load.
For the circuit of Fig. 15.40, do a sweep showing the output voltage for R L varied from 5 kΩ to 20 kΩ.Fig. 15.40 3 OFCAD Capture CIS - Derno Edition - / - (SCHEMATIC1: PAGE1)} File Edit View Tools Place Macro PSpice Accessories options Window Help cādence SCHEMATIC1-O:CAD aOCAD
Calculate the frequency of a Wien bridge oscillator circuit (as in Fig. 14.23) when R = 10 kΩ and C = 2400 pF.Fig. 14.23 R3 +Vcc Output sinusoidal Op-amp signal R2 R4 -VEE f,= 2n VR, C, R2C2 FIG. 14.23
Using Fig. 16.10a, determine the total capacitance at a reverse potential of 1 V and 8 V and find the tuning ratio between these two levels. How does it compare to the tuning ratio for the ratio between reverse bias potentials of 1.25 V and 7 V? Typical characteristics T = 25°C, unless otherwise
Calculate the gain of a negative-feedback amplifier having A=–2000 and β = –1/10.
Using Fig. 16.10a, compare the Q levels at a reverse bias potential of 1 V and 10 V. What is the ratio between the two? If the resonant frequency is 10 MHz, what is the bandwidth for each bias voltage? Compare the bandwidths obtained and compare their ratio to the ratio of Q levels.Fig. 16.10a
Referring to Fig. 16.11, if VDD = - 2 V for the varactor of Fig. 16.10, find the resonant frequency of the tank circuit if CC = 40 pF and LT = 2 mH.Fig. 16.11 Electrical Characteristics Total capacitance, C; F= 1 MHz (pF) Tuning ratio, T, F=1 MHz Part number V, = 2 Vdc MIN/TYP/MAX V,= 7
If the gain of an amplifier changes from a value of –1000 by 10%, calculate the gain change if the amplifier is used in a feedback circuit having β= –1/20.
a. For the solar cell of Fig. 16.14 , determine the ratio IVOC > fc for the range of 20 fc to 100 fc if fc1 = 40fc.b. Using the results of part (a), determine the expected level of VOC at a light intensity of 60 fc.Fig. 16.14 A Voc 0.6 0.5 I=
a. Plot the 1-V curve for the same solar cell of Fig. 16.15 but with a light intensity of fc1.b. Plot the resulting power curve from the results of part (a).c. What is the maximum power rating? How dews it compare to the maximum power rating for a light intensity fc2?Fig. 16.15 Isc 200 mA 180
Write an equation for the diode current of Fig. 16.22 versus the applied light intensity in footcandles.Fig. 16.22 I, (HA) 800 600 400 200 Dark current 1000 2000 3000 4000 5000 fe
If the illumination on the photoconductive diode in Fig. 16.28 is 10 fc, determine the magnitude of Vi to establish 6 V across the cell if R1 is equal to 5 kΩ. Use the characteristics of Fig. 16.26.Fig. 16.28Fig. 16.26 R + Light V; FIG. 16.28
a. Determine the radiant flux at a dc forward current of 70 mA for the device of Fig. 16.30.b. Determine the radiant flux in lumens at a dc forward current of 45 mA.Fig. 16.30 Case temperature (T)=27°C 10 20 40 60 80 100 120 If de forward current (mA) FIG. 16.30 6. 2. Radiant flux O (mW)
A 1-cm by 2-cm solar cell has a conversion efficiency of 9%. Determine the maximum power rating of the device.
a. What is the energy in joules associated with photons that have a wavelength matching that of the color blue in the visible spectrum?b. Repeat part (a) for the color red.c. Do the results confirm the fact that the shorter the wavelength the higher the energy level?d. Is light in the ultraviolet
For a uni junction transistor with VBB = 20 V, μ = 0.65, RB1 = 2 k (IE = 0), and VD = 0.7 V, determine:a. RB2b. RBB c. VRB1d. VP
What is the “dark current” of a photodiode?
a. Through the use of Fig. 16.31, determine the relative radiant intensity at an angle of 25° for a package with a flat glass window.b. Plot a curve of relative radiant intensity versus degrees for the flat package.Fig. 16.31 0° 10° 10° 20° 200 30° 30° 0.8 0.6 0.6 For packages with flat For
If 60 mA of dc forward current is applied to an SG1010A IR emitter, what will be the incident radiant flux in lumens 5° off the center if the package has an internal collimating system? Refer to Figs. 16.30 and 16.31.Fig. 16.30Fig. 16.31 Case temperature (T)=27°C 10 6. 20 40 60 80 100 120 If de
Using the information provided in Fig. 16.40, determine the total resistance of a 2-cm length of the material having a perpendicular surface area of 1 cm 2 at a temperature of 0°C. Note the vertical log scale.Fig. 16.40 Specific resistance (0-cm, the resistance between faces of 1 cm of the
a. Referring to Fig. 16.41, determine the current at which a 25°C sample of the material changes from a positive to a negative temperature coefficient. ( Figure 16.41 is a log scale.)b. Determine the power and resistance levels of the device ( Fig. 16.41 ) at the peak of the 0°C curves.c. At a
Redraw the common-emitter network of Fig. 5.3 for the ac response with the approximate hybrid equivalent model substituted between the appropriate terminals.Fig. 5.3 Vcc Rc R1 C2 Vo C1 R, R2 RE V, FIG. 5.3
Redraw the network of Fig. 5.183 for the ac response with the remodel inserted between the appropriate terminals. Include ro. Fig. 5.183 Vcc Rc RB Cc R, R. RE FIG. 5.183
Redraw the network of Fig. 5.184 for the ac response with the re model inserted between the appropriate terminals. Include ro. Fig. 5.184 - Vcc VEE RC RE Cc RI. R, FIG. 5.184

Showing 200 - 300 of 363

1
2
3
4

Step by Step Answers

Services

Sitemap
Fun
Definitions
Become Tutor
Used Textbooks
Study Help Categories
Recent Questions
Expert Questions
Campus Wear
Sell Your Books

Company Info

Security
Copyrights
Privacy Policy
Terms & Conditions
SolutionInn Fee
Scholarship
Online Quiz
Give Feedback, Get Rewards

Get In Touch

About Us
Contact Us
Career
Jobs
FAQ
Student Discount
Campus Ambassador

Secure Payment

Download Our App

© 2026 SolutionInn. All Rights Reserved