Question: 5. A processor has one unified cache. Its miss rate is 10% and the miss penalty is 90 cycles. The CPI and fraction of the

5. A processor has one unified cache. Its miss rate is 10% and the miss penalty is 90 cycles. The CPI and fraction of the total instruction count of each type of instruction are shown below. Calculate the ideal overall CPI. Calculate the real CPl. What is the speedup if it behaved as ideal? What is the speedup thanks to Cache? Load/Store ALU Branch 20% 55% | 25% 5.6 3.5 2.7

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