You are building a system around a processor that runs at $2\mathrm{.}0$ GHz and has a CPI of $1$ if there are no cache misses. The only instructions that read or write data from memory are loads $(15\%$ of all instructions$)$ and stores $(15\%$ of all instructions$).$ The memory system for this computer is composed of a split L$1$ cache that imposes no penalty on hits. The L$1-$I cache has miss rate of $5\%$ and the L$1-$D cache has a miss rate of $10\%.$ L$1-$D is a write back cache and $50\%$ of all data in L$1-$D are modified $($or dirty$).$ If the data is found in L$2,$ it will take $10$ns to access the data. L$2$ cache has a miss rate of $25\%.$ On a miss in L$2,$ it takes $60$ns to obtain the data from main memory. L$2$ is also organized as a write$-$back cache and $50\%$ all data is dirty.

a$.$ What is the average memory access time for instruction accesses?

b$.$ What is the overall CPI, including memory accesses?