6.1 Task 1: Bit-Slice

Your task is to design and implement the bit-slice (this could be a macro containing several sub macros) of the ALU using the Xilinx ISE software and the Prometheus FPGA board. Write a VHDL code to operate with one bit. Make sure the bit-slice is working properly and demonstrate it in the laboratory.

6.2 Task 2: 4-Bit ALU

Implement the 4-bit ALU using the bit-slice ALU. Combine consecutive bit-slices of ALU into a single circuit by connecting carry-out Cout of the previous bit-slice to the carry-in

i Ci+1 of the next bit-slice. The sample VHDL codes given in Listings 1,2 demonstrates how a

2-input XOR circuit can be used as a component (module) to construct a 4-input XOR gate. You can use this example to construct your 4-bit ALU circuit.

Note that logic results should be displayed on the LEDs and arithmetic results should be displayed on the 7-segment display as defined in section 4.3. For this purpose, you can use the sample VHDL code under the resources section of the lab web-page.

Simulate the full 4-bit ALU and verify that all logic and arithmetic operations function properly.

please explain the vhld code and timing diagram!!!!