Question: 7. - What is the PC value for the SW instruction? 124 135 120 200 - Calculate the branch target address? 116 133 120 -7

7.

7. - What is the PC value for the SW instruction? 124

- What is the PC value for the SW instruction?

124

135

120

200

- Calculate the branch target address?

116

133

120

-7

- What happens after T0 becomes equal to T3?

T0 has the value of T0+(-7)

T4 is loaded with new value from memory

T0 increases by 200

Branch is taken

- What is the total number of instructions that get fully executed?

201

12

1412

144

- How many cycles it take to execute all instructions in the given code?

576

48

5628

804

- What is the final value of T0?

400

394

401

200

Multi-Cycle Arch. Given the following code. Assume thatx andy are arrays of words and the base address of x is stored in R1 and the base address of y is stored in R2. Assume that each add operation takes 4 cycles to execute, each lw operation 5 cycles, each store sw takes 4 cycles, and each branch (bne) instruction takes 3 cycles to execute. The "T" represents Temp registers. All numbers are in decimal. add to, zero, zero # TO = 1 = 0+0 = 0 add T1, R1, zero #T1 = address of x[i] +0 add T2, R2, zero #T2 = address of y[i] +0 add T3, zero, 201 Loop: lw T4, 0(T2) # Load T4 with M[T2+0] value add T5, T4, C #Cis a constant value sw T5, 0(T1) # Store T5 to M[T1+O] add TO, TO, 1 add T1, T1,4 add T2, T2,4 140: bne TO, T3, -7 #Loops if branch is taken 144: add TO, TO, 200

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