$.$ A $16-$word cache has the parameters given below. Consider the following repeating sequence of lw addresses $($given in hexadecimal$)$:

$4044484$C $7074787$C $8084888$C $9094989$C $048$C $1014181$C $20$

The cache has the following parameters: b$,$ block size given in numbers of words; S$,$ number of sets; N$,$ number of ways; and A$,$ number of address bits.

Assuming least recently used $($LRU$)$ replacement for associative caches, determine the effective miss rate if the sequence is input to the following caches, ignoring start$-$up effects $($i$.$e$.,$ compulsory misses$).$

$($a$)$ direct mapped cache, b $=1$ word

$($b$)$ fully associative cache, b $=1$ word

$($c$)$ two$-$way set associative cache, b $=1$ word $($d$)$ direct mapped cache, b $=2$ words