Question: a . A basic SR latch is edge triggered. b . A JK flip - flop outputs change when J = 1 and K =

a. A basic SR latch is edge triggered.
b. A JK flip-flop outputs change when J=1 and K=0 and a clock edge is applied.
c. A gated D latch outputs do not change when Clk =1
d. A gated SR latch is edge triggered.
e. A T flip-flop outputs toggle when T=1 and a clock edge is applied.

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