Question: A clock-mode sequential circuit receives 2 = ZT mod8 data bits in serial form from the X-input synchronously (mnp). This circuit controls the data bits

A clock-mode sequential circuit receives 2 = ZT mod8 data bits in serial form from the X-input synchronously (mnp). This circuit controls the data bits in groups of three, making the L output logic-1 in the third clock period when there are (0np) or (1np) inputs in each group of three. Otherwise, output L is logic-0.

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a) Draw the state diagram b) Set up the situation chart

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