Question: A CPU has a 6 4 KB mapped cache with 1 2 8 - byte block size. Suppose A is a two dimensional array of
A CPU has a KB mapped cache with byte block size. Suppose A is a two
dimensional array of size times with elements that occupy bytes each. Consider the following
two code segments, P and P P and P are executed independently with the same initial state,
namely, the array A is not in the cache and ijx are in registers. Let the number of cache misses
by P be M and the number of cache misses by P be M
P
for i ; i ; i
for j ; j ; j
x Aij
P
for i ; i ; i
for j ; j ; j
x Aji
Calculate the value of MM
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