$($A$)$ IF: The instruction is read from memory using the address in the PC and then is placed in the IFnD pipeline register. The PC address is incremented by $4$ and then written back into the PC to be ready for the next clock cycle.

$($B$)$ WB: The load instruction reads the data from the MEMWB pipeline register and writing it into register $2.$

ID:The instruction portion of the IF$/$DD pipeline register supplying the $16-$bit immediate field, which is sign$-$extended to $32$

$($C$)$ bits, and the register number, $3,$ to read the register. The two values are stored in the IDVEX pipeline register, along with the incremented PC address.

$($D$)$ EX: The load instruction reads the content of register $3$ and the sign$-$extended immediate from the IDJEx pipeline register and adds them using the ALU. The sum is placed in the EX$/$MEM pipeline register.

$($E$)$

MEM: The load instruction reads the data memory using the address from the Ex$/$MEM pipeline register and loading the data into the MEM$/$WB pipeline register.