Computer organization and design, mips instructions, please solve fast

Consider cache/memory system with the following parameters Memory size= 256 bytes Cache size = 32 bytes Block size = 4 bytes CPU generates the following memory address sequence in Hex): Assume cache placement policy is direct mapped. For each address: show cache tag, cache index, cache Hit/Miss values. Use below table in your answer. Tag Index Hit/Miss Address 48 68 68 48 E8 68 3 Repeat above problem using placement policy of 2-way set associative. For each address: show cache tag, cache index, cache Hit/Miss values. Use below table in your answer. Tag Index Hit/Miss Address 48 68 68 48 E8 68 16 Points)