Consider a Direct Mapped cache with 64-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each location has one block. Starting with an empty cache assume the following memory address references in the corresponding order of tion Word Addresses in Main Memory 181 44186 253 Address 3180 43 2191 88 190 14 To what address in cache is the underlined reference above map to? Select one: O a. 5 O b. 4 O c. 6 O d. 7 f ton Word Addresses in Main Memory 181 44186 253 Address 3180 43 2191 88 190 14 To what address in cache is the underlined reference above map to? Select one: O a. 5 O b. 4 O c. 6 O d. 7 Oe. 2