Question: Consider a Direct Mapped cache with 64-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each

Consider a Direct Mapped cache with 64-bit memory address reference word

Consider a Direct Mapped cache with 64-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each location has one block. Starting with an empty cache assume the following memory address references in the corresponding order Word Addresses in Main Memory Address 3 180 43 2 191 88 190 14 181 44 186 2531 To what address in cache is the underlined reference above map to? Select one: a. 2 b. 5 GC 6 d. 7 e. 4

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