Consider an $8-$bit bit$-$parallel ALU with only four functions: add, subtract, and bit$-$ wised AND and XOR. Assume an adder$/$subtractor module uses a hybrid adder de$-$ signed from CLA $(2)$ modules. In addition, the overflow flag must be masked out when performing bitwise computation. Assume only $8-$bit, $2-$to$-1$ MUXs are available.

$($i$)$ Draw a truth table for $$MAP function.

$($ii$)$ Draw an ALU Data path diagram like that of Figure $3\mathrm{.}16$ in your textbook reflecting $4$ functions, Map function, Mask generation, and multiplexers for the final output. $($Note you have only $8$bit $2$:$1$ muxes available.$).$ Appropriately connect mux selects with control signals generated from the map function.