Question: Consider the following behavior of a sequential logic. A state machine for this behavior will have one input named X , one output named Z

Consider the following behavior of a sequential logic. A state machine for this behavior will have one input named X, one output named Z, and a 2-bit register (using D-type flip-flops) for state information. Assume that the state is represented by the Q1Q0 signals of the register. The four states are coded as follows: Q1Q0=00 means S0; Q1Q0=01 means S1; Q1Q0=10 means S2; and Q1Q0=11 means S3.

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