Create a Verilog code to show in the $7$ segment display of the NEXYS$-4$ ARTIX$-7$ FPGA board the value stored in the registers of a unicicle RISC V processor. The register $[0]$ has a value of h$\text{'}$FC $(282$ decimal$),$ register$[1]$ has h$\text{'}$A$6(166$ decimal$)$ and register$[2]$ contains the result of the sum of this two registers.