Design a full adder that takes two $1-$bit inputs $(x$ and $Y,$ or A and $B)$ to represent the two significant bits to be added and another input $,$ or $C_{in})$ to represent the carry from the previous lower significant position. The outputs will have two bits $(C_{\text{o}\text{u}\text{t}}$ and $S).$

Include the following in your lab report:

Truth table by hand.

K$-$maps by hand $($there will be $2$ K$-$maps: one for output $S$ and one for output $C_{\text{o}\text{u}\text{t}}).$

Simplified logical expressions $($simplify as much as possible$).$

Design a $(1$ bit$)$ half adder that will output the SUM $($S$)$ and CARRY $(C_{\text{o}\text{u}\text{t}}).$ Just like a full adder, a half adder contains two inputs $($two $1-$bit binary numbers$)$ and two outputs $($also two $1-$bit binary numbers$).$

Include the following in your lab report:

Half adder truth table by hand

K$-$maps by hand $($there will be $2,$ one for output $S$ and one for output $C_{\text{o}\text{u}\text{t}}).$

Using your circuit diagram of the full$-$adder from the previous section, COMBINE the full adder circuit diagram with the half adder circuit diagram to create a $2-$bit adder.