Design the decoding circuits for an Intel 8051 microcontroller system (Harvard architecture) that has a total of 16Kx8 EPROM space using one 16Kx8 chip and a total of 8Kx8 RAM using two 4Kx8 chips. The EPROM should be mapped as CODE MEMORY starting at address 0x0000 and the RAM should be mapped as DATA MEMORY with one chip starting at address 0x0000 and one chip ending at 0xFFFF. Use ABSOLUTE decoding with no fold-back for both code memory and data memory.

Show the following items:

MEMORY MAPS

MEMORY ADDRESS TABLES

BOOLEAN EQUATIONS for each chip select signal

(The original also asked for circuit diagrams, but I've got that down).