Determine the waveforms for the $4$ Q outputs given the signals below. At each clock cycle, indicate the mode of operation of the shift register $($e$.$g$.,$ LD$,$ Set, Reset, CLR$,...).$ Note: You can printout the worksheet on the last page to answer this question. If you choose not to use the worksheet, be sure to redraw all the relevant waveforms so your answer is clear. b$.$ Use two $74$HC$1954-$bit shift registers to create an $8-$bit shift register. Show all the required connections between the relevant pins on the two ICs. a$.$ Determine the waveforms for the $4$ Q outputs given the signals below. At each clock cycle, indicate the mode of operation of the shift register $($e$.$g$.,$ LD$,$ Set, Reset, CLR$,...).$ Note: You can printout the worksheet on the last page to answer this question. If you choose not to use the worksheet, be sure to redraw all the relevant waveforms so your answer is clear.

b$.$ Use two $74$HC$1954-$bit shift registers to create an $8-$bit shift register. Show all the required connections between the relevant pins on the two ICs.

Show how a $4-$bit serial$-$in parallel$-$out shift register can be constructed from J$-$K flip$-$flops.

Consider a sequence detector that detects three consecutive ones $($i$.$e$.,111).$ Use a Moore FSM to implement this detector. Show all five steps, which culminates with the logic circuit diagram, as discussed in class.

Use a Mealy FSM to implement the detector given in Question $3.$ Show all five steps.

How does this design compare with the design implemented as a Moore FSM$?$ Specifically, comment on the number of logic elements and when the output appears relative to the change in the input signal.