Help me with a computer architecture question regarding caches: (write through, writeback, etc)

Assume a 2-way set-associative cache with 32 cache sets, 4 words per block, and an LRU replacement policy. For both a write-through, no write-allocate and a write-back, write-allocate cache, fill in the appropriate information for the following memory references (see slide 65 of Lecture 11). W 1840 R 1844 R 304 W 308 R 820 R 824 Assume a 2-way set-associative cache with 32 cache sets, 4 words per block, and an LRU replacement policy. For both a write-through, no write-allocate and a write-back, write-allocate cache, fill in the appropriate information for the following memory references (see slide 65 of Lecture 11). W 1840 R 1844 R 304 W 308 R 820 R 824