Question: Implement a cache simulator in C++. The simulator must read a memory access trace from a given file, simulate what a cache based on certain

Implement a cache simulator in C++. The simulator must read a memory access trace from a given file, simulate what a cache based on certain parameters would do in response to these memory access patterns, and produce some summary statistics.

The format of the memory access traces in the file is as follows: Implement a cache simulator in C++. The simulator must read a memory

Each memory access performed by a program is recorded on a separate line. There are three "fields" separated by white space. The first field is either "l" or "s" depending on whether the processor is "loading" from or "storing" to memory. The second field is a 32-bit memory address given in hexadecimal; the "0x" at the beginning means "the following is hexadecimal" and is not itself part of the address.

The cache simulator takes several parameters describing the cache (number of sets in the cache (a positive power-of-2), number of blocks in each set (a positive power-of-2), number of bytes in each block (a positive power-of-2, at least 4), write-allocate (1) or not (0), write-through (1) or write-back (0), least-recently-used (1) or FIFO (0) evictions) along with a memory access trace file for an input program.

Your cache simulator should assume that loads/stores from/to the cache take one processor cycle; loads/stores from/to memory take 100 processor cycles for each 4-byte quantity that is transferred. There are plenty of things about caches in real processors that you do not have to simulate, for example write buffers or smart ways to fill cache blocks. Your program should be able to run with following command line arguments ./csim 256 4 16 1 0 1 gcc.trace

s 0x1fffff50 1 1 0xl fffff58 1 1 0xl fffff88 6 1 0xl fffff90 2 1 0x 1 ffff982 1 0x200000e0 2 1 0x200000e8 2 1 0x200000fo 2 1 0x200000f8 2 10x30031f103 s Ox3004d9600 s 0x3004d968 1 s 0x3004caa0 1 s 0x3004d970 1 s 0x3004d980 6 1 0x30000008 1 1 0xl ffff58 4 1 0x3004d978 4 1 0x1fffff68 4 1 0xl fffff68 2 s 0x3004d980 9 1 0x30000008 1 1 s 0x1fffff50 1 1 0xl fffff58 1 1 0xl fffff88 6 1 0xl fffff90 2 1 0x 1 ffff982 1 0x200000e0 2 1 0x200000e8 2 1 0x200000fo 2 1 0x200000f8 2 10x30031f103 s Ox3004d9600 s 0x3004d968 1 s 0x3004caa0 1 s 0x3004d970 1 s 0x3004d980 6 1 0x30000008 1 1 0xl ffff58 4 1 0x3004d978 4 1 0x1fffff68 4 1 0xl fffff68 2 s 0x3004d980 9 1 0x30000008 1 1

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