Question: IN+ Analog input DB IN- ? RD 4RD CLKR WR WR CLK R(10K) C(150 pF) 0 A Y. Y INTR A1 B REF/2 REF A2

 IN+ Analog input DB IN- ? RD 4RD CLKR WR WRCLK R(10K) C(150 pF) 0 A Y. Y INTR A1 B REF/2

IN+ Analog input DB IN- ? RD 4RD CLKR WR WR CLK R(10K) C(150 pF) 0 A Y. Y INTR A1 B REF/2 REF A2 A3 Y3 74LS138 Y es AGND A4- G. G 1 1 1 1 1 Y ADC 0804 G A10 A11 A12 A13 A14 A15 A5 A6 A7 A8 A9 MIO Figure 3 4. Figure 3 shows an Analog-to-Digital Converter (ADC) connected to an 8086 system. Based on the figure, answer the following questions. (a) Determine the ADC address. (3 marks) (6) Determine the address for interrupt (INT) of the ADC. (3 marks) Write an assembly language procedure to start conversion and read the converted digital data. (4 marks) (d) The ADC connection is modified such that the INT signal is required to be connected to INT 8086 input pin. Given, the system has THREE (3) other interrupt inputs with interrupt vector 56H, 57H and 58H. (1) Suggest an interrupt structure so that the 8086 systems can handle all interrupts. (4 marks) (ii) Draw the schematic of the interrupt structure as you suggest in (i). (6 marks) (111) Discuss how the interrupt structure you choose in (i) determines the interrupt priority. (4 marks) (iv) Suggest an interrupt vector for the ADC. (2 marks) (v) Provide address for all interrupt vectors in the system. (4 marks) IN+ Analog input DB IN- ? RD 4RD CLKR WR WR CLK R(10K) C(150 pF) 0 A Y. Y INTR A1 B REF/2 REF A2 A3 Y3 74LS138 Y es AGND A4- G. G 1 1 1 1 1 Y ADC 0804 G A10 A11 A12 A13 A14 A15 A5 A6 A7 A8 A9 MIO Figure 3 4. Figure 3 shows an Analog-to-Digital Converter (ADC) connected to an 8086 system. Based on the figure, answer the following questions. (a) Determine the ADC address. (3 marks) (6) Determine the address for interrupt (INT) of the ADC. (3 marks) Write an assembly language procedure to start conversion and read the converted digital data. (4 marks) (d) The ADC connection is modified such that the INT signal is required to be connected to INT 8086 input pin. Given, the system has THREE (3) other interrupt inputs with interrupt vector 56H, 57H and 58H. (1) Suggest an interrupt structure so that the 8086 systems can handle all interrupts. (4 marks) (ii) Draw the schematic of the interrupt structure as you suggest in (i). (6 marks) (111) Discuss how the interrupt structure you choose in (i) determines the interrupt priority. (4 marks) (iv) Suggest an interrupt vector for the ADC. (2 marks) (v) Provide address for all interrupt vectors in the system. (4 marks)

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