Lab logic

The following module definition is for a 3-bit Adder/Subtractor with 7-inputs (i.e. Select, A2, A1, AO, B2, BI, BO) and 4 outputs (i.e. Cout, S2, SI, SO) Select = 0, the module performs addition operation (i.e. A + B). When Select = 1, the module performs subtraction operation (i.e. A-B). module Three_Bit_Add_Sub (Select, A2, A1, A,B2,B1,BO, Cout,52,51,50); Choose the correct Verilog statements to complete the following module which implements a 3-bit multiplier which multiplies input A (i.e. A2. with A2 as the most significant bit) by constant number 5 (i.e. 101 in binary format): module Three_Bit_Mul (A2, A1, AO, C5, C4, C3, C2, CI, CO); input A2, AI, AO; output C5, C4, C3, C2, CI, CO; assign CO = AO; The following module definition is for a 3-bit Adder/Subtractor with 7-inputs (i.e. Select, A2, A1, AO, B2, BI, BO) and 4 outputs (i.e. Cout, S2, SI, SO) Select = 0, the module performs addition operation (i.e. A + B). When Select = 1, the module performs subtraction operation (i.e. A-B). module Three_Bit_Add_Sub (Select, A2, A1, A,B2,B1,BO, Cout,52,51,50); Choose the correct Verilog statements to complete the following module which implements a 3-bit multiplier which multiplies input A (i.e. A2. with A2 as the most significant bit) by constant number 5 (i.e. 101 in binary format): module Three_Bit_Mul (A2, A1, AO, C5, C4, C3, C2, CI, CO); input A2, AI, AO; output C5, C4, C3, C2, CI, CO; assign CO = AO