Number 2 ONLY, please help

a) [3 Points] What is the clock cycle time for a nonpipelined processor? b) [2 Points] What is the clock cycle time for a pipelined processor? Question 2. Suppose that we modified the pipelined processor described in Question 1 such that all data memory reads and memory writes were split into two separate stages of 50 ps. each. a) [1 Points] Would the overall throughput increase or decrease in the modified architecture? b) [2 Points] What is the cycle time of modified pipelined processor