P4. (10 pts) Use with-select and when statements to write a complete VHDL code to describe the circuit represented by the following truth table. Your VHDL code should not describe the Boolean equation of the circuit. Hint: recall we discussed a similar problem in class. Instead of using BIT or BIT_VECTOR, you should use STD_LOGIC or STD LOGIC_VECTOR. 0 0 0 0 0 0 0 0 P5. (10 pts) Use structural modeling technique to write a complete VHDL code for the circuit described by logic function Y= AC+ A'B + ABC, by using a 8:1 multiplexer. Your VHDL code should be in text format (not image, not screen capture) so that we can copy and paste it into Active-HDL software to compile it